Broadcom Hiring: a Design for Test (DFT) Engineer

Broadcom Careers: Design for Test (DFT) Engineer

Broadcom provides the semiconductors and infrastructure software that power the world’s most complex, mission-critical needs. By combining long-term R&D investment with superb execution, we deliver the best technology at scale. From the data centers powering the AI revolution to the wireless chips in your hand, our breakthroughs shape global markets.

We are seeking a high-performing DFT Engineer to join our silicon engineering team. In this role, you will be responsible for ensuring the quality, reliability, and manufacturability of our high-performance chips, ensuring that Broadcom continues to lead the industry in silicon excellence.

 About the Role: Ensuring Quality at Scale

As a DFT Engineer at Broadcom, you will be the gatekeeper of silicon reliability. You will work across the entire design lifecycle—from architectural definition to post-silicon validation—ensuring that our products meet the highest standards of test coverage and manufacturing efficiency.

Key Responsibilities:

• Test Architecture: Define and implement robust DFT architectures for complex, multi-million gate SoCs.

• Scan & ATPG: Lead Scan insertion, compression, and Automatic Test Pattern Generation (ATPG) to achieve maximum fault coverage.

• Memory & Logic BIST: Implement and verify Memory Built-In Self-Test (MBIST) and Logic BIST (LBIST) strategies.

• Timing & Closure: Work closely with the Physical Design team to ensure DFT logic meets timing, power, and area (PPA) targets.

• Simulation & Verification: Conduct gate-level simulations to validate test patterns and ensure zero-defect manufacturing.

• Post-Silicon Support: Collaborate with the Product Engineering team to debug and characterise silicon on ATE (Automated Test Equipment).

 Qualifications & Technical Mastery

The ideal candidate is a detail-oriented engineer who thrives on the challenge of making “untestable” designs testable.

• Core Technical Skills: Proven expertise in DFT flows and industry-standard tools (Tessent, Modus, or Synopsys DFT Compiler).

• Methodology: Deep understanding of Boundary Scan (JTAG), Scan Compression, and Hierarchical DFT.

• Scripting: Proficiency in Tcl, Perl, or Python to automate complex DFT flows.

• Advanced Nodes: Experience implementing DFT on advanced process nodes (7nm, 5nm, or below).

• Communication: Excellent ability to collaborate with RTL, Physical Design, and Product teams.

 Why Join Broadcom?

Broadcom is where engineering precision meets global scale.

• Market-Shaping Impact: Work on the chips that form the backbone of networking, servers, and cybersecurity.

• Innovation at Scale: Tackle complex testability challenges in high-speed connectivity and storage systems.

• Inclusive Culture: Broadcom is a proud Equal Opportunity Employer. We value diversity as a core driver of innovation.

• Unmatched R&D: Join an organisation that invests in long-term technical breakthroughs and superb execution.

 How to Apply

Ready to ensure the reliability of the world’s most advanced silicon?

1. Highlight Your Coverage Wins: Be prepared to discuss your experience in reaching high fault coverage in complex SoCs.

2. Showcase Your Debug Skills: We value engineers who can bridge the gap between design and silicon characterisation.

[Apply Now: DFT Engineer at Broadcom]